Chip design research
Convay-Mead & Cassowary
Electronic design research spanning placement, routing, chiplet partitioning, thermal and timing constraints, memory, power/performance/area and equivalent netlist optimization.
What you can explore
Explore electronic-design optimization, including placement, routing, chiplet partitioning, thermal constraints and netlists.
Scope and availability
Convay-Mead addresses chip-design optimization. Cassowary works on EDIF netlists with an emphasis on preserving logical equivalence.
A useful first evaluation
Choose a design with established checks. Evaluate equivalence, timing, area, power and manufacturability constraints before accepting an optimized result.
Start with your problem.
Talk to Quzones about Convay-Mead & Cassowary, your constraints and the next practical step.
Discuss an evaluation ↗